1. Field of the Invention
The present invention generally relates to semiconductor devices, and more particularly to a semiconductor device and a manufacturing method thereof. The semiconductor device has upper and lower package half-bodies which have different dimensions from each other, and leads extending from positions between the upper and lower package half bodies so that inspection can be performed using the exposed portions of the leads.
2. Description of the Related Art
Recently, semiconductor devices have become highly integrated, and thus the semiconductor devices are provided with a large number of pins which extend from a package thereof within a narrow space. Accordingly, the pins have become smaller in width as well as thickness, and thus the strength of those leads has tended to decrease.
Semiconductor devices are subject to a burn-in test, which is a kind of screening test, before they are delivered from a manufacturing plant so as to reduce the possibility of malfunctioning after they are delivered. When performing the burn-in test, a probe is placed in contact with each lead of the semiconductor devices. If the leads touched by the probe do not have enough strength, the leads may be damaged or broken. In order to eliminate this problem, there has been developed a semiconductor device having an upper package half-body and a lower package half-body which have different dimensions from each other, and leads extending from positions between the upper and lower package half-bodies so that inspection can be performed using exposed portions of the leads. In such a semiconductor device, the exposed portions of the leads must be completely bare so that the probe of the test instrument can make complete contact with the leads during the burn-in test.
FIG. 1 is a cross sectional view of a conventional semiconductor device having an upper package half-body and a lower package half-body having different sizes from each other. The semiconductor device 1 shown in FIG. 1 comprises a semiconductor chip 2, leads 4 and a resin package 6.
The semiconductor chip 2 is connected to the leads 4, via gold bumps 5, formed on a TAB (Tape Automated Bonding) tape 3. The semiconductor chip 2 is molded in the resin package 6. The resin package 6 comprises an upper package half-body 6a and a lower package half-body 6b which are integrally formed by molding. A horizontal section of the upper package half-body 6a is smaller than that of the lower package half-body. Accordingly, a stage 7 is formed on a surface of the lower package half-body 6b, on which surface the upper package half-body 6b is formed.
The leads 4 extend outside the package 6 from portions located at a junction of the upper package half-body 6a and the lower package half-body 6b. Accordingly a surface of a portion 4a (herein after referred to as a test pad 4a) of each of the leads 4 is exposed to outside, which portion runs along the stage 7. When performing a burn-in on the semiconductor device 1, the test pad 4a of each of the leads 4 is touched by a probe of a test instrument. Since the test pad 4a is supported and fixed on a stage 7 of the lower surface 6b, the leads 4 (test pads 4a) are not damaged or broken even if pitches between the leads 4 are minimized.
The above-mentioned semiconductor device 1 is formed in the manner described below. FIG. 2 is an illustration for explaining a process for molding the semiconductor device 1. The package 6 of the semiconductor device 1 is formed by molding using a molding die 8.
The molding die 8 comprises an upper die 8a and a lower die 8b. The upper die has a cavity 9a corresponding to the upper package half-body 6a. The lower die 8b has a cavity 9b corresponding to the lower package half-body 6b.
When a molding is performed, the TAB tape 3 is sandwiched between the upper mold 8a and the lower mold 8b with the semiconductor chip 2 located in the center of the cavity 9b. The semiconductor chip 2 is supported only by the leads 4 formed on the TAB tape 3.
A molding resin is then injected into the cavities 9a and 9b through a gate 10. At this time, since the semiconductor chip 2 is supported by the thin and flexible TAB tape 3 and the thin leads 4, the semiconductor chip 2 is displaced by a force exerted on the semiconductor chip 2 due to flow of the resin injected into the cavities 9a and 9b. Accordingly, the TAB tape 3 and the leads 4 are bent as illustrated by dashed lines in FIG. 2.
If the TAB tape 3 and the leads 4 are bent, a small gap is formed between the test pads 4a and a surface of the upper die 8a, and the molding resin may flow into the gap. In such a case, a thin film 6c of the molding resin remains on the surface of the test pads 4a as shown in FIG. 1. Accordingly, there is a problem in that a burn-in test cannot be performed because the probe of the test instrument cannot directly touch the test pads 4a to make an electrical connection.